| IOASIC(9) | Kernel Developer's Manual | IOASIC(9) | 
IOASIC, ioasic_intr_establish,
  ioasic_intr_disestablish,
  ioasic_intr_evcnt,
  ioasic_attach_devs,
  ioasic_submatch —
#include <sys/bus.h>
#include <dev/tc/tcvar.h>
#include <dev/tc/ioasicreg.h>
#include <dev/tc/ioasicvar.h>
void
  
  ioasic_intr_establish(struct
    device *dev, void
    *cookie, int level,
    int (*handler)(void *),
    void *arg);
void
  
  ioasic_intr_disestablish(struct
    device *dev, void
    *cookie);
const struct evcnt *
  
  ioasic_intr_evcnt(struct
    device *dev, void
    *cookie);
void
  
  ioasic_attach_devs(struct
    ioasic_softc *sc, struct
    ioasic_dev *ioasic_devs,
    int ioasic_ndevs);
int
  
  ioasic_submatch(struct
    cfdata *match, struct
    ioasicdev_attach_args *ia);
IOASIC device provides support for the DEC
  proprietary IOCTL ASIC found on all DEC TURBOchannel machines with MIPS
  (DECstation 5000 series, excluding the 5000/200) and Alpha (3000-series)
  systems. The IOASIC is memory-mapped into the
  TURBOchannel system slot to interface up to sixteen I/O devices. It connects
  the TURBOchannel to a 16-bit wide I/O bus and supplies various control signals
  to the devices that share this bus.
The IOASIC provides hardware DMA channels
    and interrupt support. DMA transfers are between one and four 32-bit words
    (16 bytes) in length, depending on the device. The
    IOASIC stores the data in internal data registers.
    The data is transferred to and from the registers in 16-bit words to the
    device. Various interrupts are signalled on DMA pointer-related
  conditions.
IOASIC will make use
  of the following data types:
IOASIC device properties. It contains the
      following members:
    
	char			iada_modname
	tc_offset_t		iada_offset
	tc_addr_t		iada_addr
	void			*iada_cookie;
    
    
	bus_space_tag_t		sc_bst;
	bus_space_handle_t	sc_bsh;
	bus_dma_tag_t		sc_dmat;
    
    IOASIC containing the following members:
    
	char			*iad_modname;
	tc_offset_t		iad_offset;
	void			*iad_cookie;
	uint32_t		iad_intrbits;
    
    ioasic_intr_establish(dev,
    cookie, level,
    handler, arg)ioasic_intr_disestablish(dev,
    cookie)ioasic_intr_evcnt(dev,
    cookie)ioasic_attach_devs(sc,
    ioasic_devs, ioasic_ndevs)ioasic_submatch(match,
    ia)The ioasic_intr_establish(),
    ioasic_intr_disestablish(), and
    ioasic_intr_evcnt() functions are likely to used by
    all IOASIC device drivers. The
    ioasic_attach_devs() function is used by ioasic
    driver internally and is of interest to driver writers because it must be
    aware of your device for it to be found during autoconfiguration.
IOASIC to be used by the ioasic driver. The ioasic
  driver will pass this array to ioasic_attach_devs() to
  attach the drivers with the devices.
Drivers match the device using iada_modname.
During attach, all drivers should use the parent's bus_space and
    bus_dma resources, and map the appropriate bus_space region using
    bus_space_subregion() with
    iada_offset.
IOASIC DMA beyond
  the facilities provided by the
  bus_dma(9) interface.
The IOASIC provides two pairs of DMA
    address pointers (transmitting and receiving) for each DMA-capable device.
    The pair of address pointers point to consecutive (but not necessarily
    contiguous) DMA blocks of size IOASIC_DMA_BLOCKSIZE. Upon successful
    transfer of the first block, DMA continues to the next block and an
    interrupt is posted to signal an address pointer update. DMA transfers are
    enabled and disabled by bits inside the IOASIC
    status (CSR) register.
The interrupt handler must update the address pointers to point to the next block in the DMA transfer. The address pointer update must be completed before the completion of the second DMA block, otherwise a DMA overrun error condition will occur.
| August 6, 2000 | NetBSD 9.4 |